Cirrus-logic CDB5566 Uživatelský manuál stáhnout pdf

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CDB5566

5 kSps, 24-bit, High-throughput

ΔΣ

ADC

Evaluation Board

Features

 Two Analog Input Channels Multiplexed to the CS5566 ADC

 Pre-configured to require a minimum number of external

connections to your data acquisition system.

 All functionality accessible through the connector interface

and board-level options.

 On-board 4.096 V Reference

 Pre-configured for Master mode SPI™ communication to a

data capture system.

General Description

The CDB5566 is a versatile tool designed for evaluating the func-

tionality and performance of the CS5566 ADC (Analog-to-Digital

Converter). The SPI serial port on the CDB5566 evaluation board

is configured in Master mode and will start transmitting data after

power-up upon reset. This evaluation board is designed to connect

to your data capture system or will interface to the CapturePlus II

data acquisition system available from Cirrus Logic.

The CS5566 delta-sigma ADC produces fully settled conversions to

full specified accuracy at 5 kSps. This ability to produce fully settled

conversions for every sample makes it suitable for converting multi-

plexed input signals. To help evaluate this feature, the CDB5566

includes two differential analog inputs multiplexed into the CS5566.

The multiplexer can be switched at the CS5566 ADC sample speed

and the ADC will produce fully settled conversion data for each input

channel.

All evaluation board functionality for evaluating the CS5566 ADC is

accessed through the connector interface and board-level options.

Schematics in PADS™ PowerLogic™ format are available for

download at:

http://www.cirrus.com/en/products/pro/detail/P1120.html

ORDERING INFORMATION

CDB5566 Evaluation Board

OCT ‘09

DS806DB3

1 2 3 4 5 6 ... 25 26

Shrnutí obsahu

Strany 1 - Evaluation Board

Strany 2 - LIST OF TABLES

CDB556610 DS806DB3APPENDIX B. BILL OF MATERIALS CIRRUS LOGICCDB5566-Z_REV_C1.PLBILL OF MATERIALItem Cirrus P/N Rev Descript

Strany 3 - 1. INTRODUCTION

CDB5566DS806DB3 11APPENDIX C. SCHEMATICS Figure 3. Schematic - Block Diagram

Strany 4 - 1.1 Overview

CDB556612 DS806DB3 Figure 4. Schematic - Power Supplies

Strany 5 - DC Supply

CDB5566DS806DB3 13 Figure 5. Schematic - Input Buffers and Multiplexer

Strany 6 - 3.3.1 Analog Input Buffers

CDB556614 DS806DB3 Figure 6. Schematic - CS5566

Strany 7 - 3.3.5 ADC Reference Frequency

CDB5566DS806DB3 15 Figure 7. Schematic - Configuration & Misc.

Strany 8 - 3.4.1 Hardware Configuration

CDB556616 DS806DB3APPENDIX D. LAYER PLOTS CDB5566Figure 8. Top SilkscreenCalibration function has been rem

Strany 9 - A.2 Hardware Considerations

CDB5566DS806DB3 17 Figure 9. Top Solder Mask

Strany 10 - 10 DS806DB3

CDB556618 DS806DB3 Figure 10. Top Routing

Strany 11 - DS806DB3 11

CDB5566DS806DB3 19 Figure 11. Ground Plane

Strany 12 - 12 DS806DB3

CDB55662 DS806DB3TABLE OF CONTENTS1. INTRODUCTION ...

Strany 13 - DS806DB3 13

CDB556620 DS806DB3 Figure 12. Power Plane

Strany 14 - Figure 6. Schematic - CS5566

CDB5566DS806DB3 21 Figure 13. Bottom Solder Mask

Strany 15 - DS806DB3 15

CDB556622 DS806DB3 Figure 14. Bottom Silkscreen

Strany 16 - 16 DS806DB3

CDB5566DS806DB3 23 Figure 15. Top Solder Paste Mask

Strany 17 - Figure 9. Top Solder Mask

CDB556624 DS806DB3 Figure 16. Bottom Routing

Strany 18 - Figure 10. Top Routing

CDB5566DS806DB3 25APPENDIX E. CALIBRATION FUNCTIONThe calibration function has been removed from the CS5566. All references to calibration have been r

Strany 19 -

CDB556626 DS806DB3REVISION HISTORY Revision Date ChangesDB1 SEP 2007 Initial Release.DB2 DEC 2007 Changed op amps to

Strany 20 - Figure 12. Power Plane

CDB5566DS806DB3 31. INTRODUCTIONThe CDB5566 evaluation board is a platform for evaluating the CS5566 ADC performance. The evalua-tion board is design

Strany 21 - DS806DB3 21

CDB55664 DS806DB31.1 OverviewThe CDB5566 evaluation board has both analog and digital circuit sections. The analog section consistsof the CS5566 ADC,

Strany 22 - Figure 14. Bottom Silkscreen

CDB5566DS806DB3 52. QUICK START The CDB5566 evaluation board is designed to interface with a data acquisition system. To conne

Strany 23 - DS806DB3 23

CDB55666 DS806DB33. HARDWARE DESCRIPTION3.1 Absolute Maximum RatingsObserve the following limits to ensure the CDB5566 component ratings are not excee

Strany 24 - Figure 16. Bottom Routing

CDB5566DS806DB3 7For detailed information on the LMP7732 precision industrial op-amps, please visit National Semiconduc-tor’s website at www.national.

Strany 25 - DS806DB3 25

CDB55668 DS806DB33.4 Digital Section3.4.1 Hardware ConfigurationThe CDB5566 evaluation board hardware comes pre-configured so the only connection requ

Strany 26

CDB5566DS806DB3 9APPENDIX A. MAXIMIZING THE PERFORMANCE OF THE CS5566A.1 PCB Layout Considerations• Keep the signal path short between the CS5566 ADC

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Cirrus-logic CDB5566 Uživatelský manuál

Procházejte online nebo si stáhněte Uživatelský manuál pro Hardware Cirrus-logic CDB5566. Cirrus Logic CDB5566 User Manual Uživatelská příručka

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