Cirrus-logic CS42L52 Uživatelský manuál stáhnout pdf (Strana 10)

10 DS680F2

CS42L52

3/1/13

1.1 I/O Pin Characteristics

Input and output levels and associated power supply voltage are shown in the table below. Logic levels

should not exceed the corresponding power supply voltage.

Power

Supply

Pin Name I/O Internal

Connections

Driver Receiver

RESET Input - - 1.65 V - 3.47 V, with Hysteresis

AD0 Input - - 1.65 V - 3.47 V, with Hysteresis

SCL Input - - 1.65 V - 3.47 V, with Hysteresis

SDA Input/

Output

- 1.65 V - 3.47 V, CMOS/Open

Drain

1.65 V - 3.47 V, with Hysteresis

MCLK Input - - 1.65 V - 3.47 V

LRCK Input/

Output

Weak Pullup

(~1 M)

1.65 V - 3.47 V, CMOS 1.65 V - 3.47 V

SCLK Input/

Output

Weak Pullup

(~1 M)

1.65 V - 3.47 V, CMOS 1.65 V - 3.47 V

SDOUT Output Weak Pullup

(~1 M)

1.65 V - 3.47 V, CMOS

SDIN Input - - 1.65 V - 3.47 V

VA SPKR/HP Input - - 1.65 V - 2.63 V

SPKR_OUTA+ Output - 1.6 V - 5.25 V Power MOSFET -

SPKR_OUTA- Output - 1.6 V - 5.25 V Power MOSFET -

SPKR_OUTB+ Output - 1.6 V - 5.25 V Power MOSFET -

SPKR_OUTB- Output - 1.6 V - 5.25 V Power MOSFET -

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 81 82

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Cirrus-logic CS42L52 Uživatelský manuál Strana 10