Cirrus-logic CDB5532U Uživatelský manuál

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Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
http://www.cirrus.com
AIN1+
AIN1-
AIN2+
AIN2-
CRYSTAL
4.9152 MHz
CS5532
A1
A0
SCLK
SDO
SDI
CS
C8051F320
Microcontroller
RESET
CIRCUITRY
Interface Header
AIN1+
AIN1-
AIN2+
AIN2-
VREF-
VREF+
VREF
Source
Select
LT1019
VREF+
VREF-
VD+
VA- VA+
GND
+5 V
USB
CONNECTOR
CDB5532U
CDB5532U Evaluation Board and Software
Features
USB Communication with PC
On-board Microcontroller
On-board Voltage Reference
Evaluation Software
Register Setup & Chip Control
FFT Analysis
Time Domain Analysis
Noise Histogram Analysis
Interface Header for External Microcontroller
General Description
The CDB5532U is an inexpensive tool designed to eval-
uate the functionality and performance of the CS5532.
The CS5532 datasheet should be read and consulted
when using the CDB5532U evaluation board.
The evaluation board includes a C8051F320 microcon-
troller with a USB interface. The microcontroller controls
the serial communication between the evaluation board
and the PC via the firmware, enabling quick and easy ac-
cess to all of the CS5532’s registers and functions.
The CDB5532U includes software for data capture, time
domain analysis, histogram analysis, and frequency do-
main analysis.
ORDERING INFORMATION
CDB5532U Evaluation Board
AUG ‘07
DS807DB1
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Copyright © Cirrus Logic, Inc. 2007(All Rights Reserved)http://www.cirrus.comAIN1+AIN1-AIN2+AIN2-CRYSTAL4.9152 MHzCS5532A1A0SCLKSDOSDICSC8051F320Micro

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CDB5532U10 DS807DB12.2.3 Data Collection WindowThe Data Collection window (Figure 5) allows the user to collect sample sets of data from the CS5532 an

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CDB5532UDS807DB1 112.2.4 Configuration WindowThe Configuration window allows the user to set up the data collection and analysis parameters. See Fig-u

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CDB5532U12 DS807DB12.3 Collecting Data SetsTo collect a sample data set:1) In the Data Collection window, select the Config button to bring up the Con

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CDB5532UDS807DB1 132.7 Histogram InformationThe following is a description of the indicators associated with histogram analysis. Histograms can be plo

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CDB5532U14 DS807DB13. SCHEMATICS Figure 7. Analog Section

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CDB5532UDS807DB1 15 Figure 8. Digital Section

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CDB5532U16 DS807DB1Figure 9. Power Supply

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CDB5532UDS807DB1 174. BOARD LAYOUT Figure 10. Top Silkscreen

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CDB5532U18 DS807DB1 Figure 11. Top Routing

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CDB5532UDS807DB1 19 Figure 12. Bottom Routing

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CDB5532U2 DS807DB1TABLE OF CONTENTS1. HARDWARE ...

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CDB5532U20 DS807DB1 Figure 13. Bottom Silkscreen

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CDB5532UDS807DB1 21NOTES

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CDB5532U22 DS807DB1REVISION HISTORY Revision Date ChangesDB1 AUG 2007 Initial release.Contacting Cirrus Logic SupportFor a complete listin

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CDB5532UDS807DB1 31. HARDWARE1.1 IntroductionThe CDB5532U evaluation board provides a quick means of evaluating the CS5532 Analog-to-DigitalConverter

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CDB5532U4 DS807DB1Table 1. Voltage Reference Selection for VREF+ Table 2. Voltage Reference Selection for VREF- 1.2.2 Digital SectionFigure 8 illustra

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CDB5532UDS807DB1 52. SOFTWAREThe evaluation board comes with software and a USB cable to link the evaluation board to the PC. Thesoftware is designed

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CDB5532U6 DS807DB12.2.1 Start-Up WindowWhen the evaluation program is launched, the start-up window will appear. This window contains infor-mation con

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CDB5532UDS807DB1 72.2.1.2 Window MenuAfter the user selects the appropriate setup, the Window option becomes available in the Start-up window.The Wind

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CDB5532U8 DS807DB1Read Data: This button will instruct the ADC to begin performing repeated single (fully-settled) conver-sions on the setup channel s

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CDB5532UDS807DB1 9Calibration Window: The Calibration window (Figure 4) permits the user to access the calibration regis-ters for each channel of the

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