Cirrus-logic EP7309 Uživatelský manuál stáhnout pdf

Copyright Cirrus Logic, Inc. 2011

(All Rights Reserved) MAR ‘11

DS507F2

http://www.cirrus.com

High-performance,

Low-power, System-on-chip

with Enhanced

Digital Audio Interface

EP7309 Data Sheet

OVERVIEW

BLOCK DIAGRAM

FEATURES

(cont.)

(cont.)

ARM720T Processor

— ARM7TDMI CPU

— 8 KB of four-way set-associative cache

— MMU with 64-entry TLB

— Thumb code support enabled

Ultra low power

— 90 mW at 74 MHz typical

— 30 mW at 18 MHz typical

— 10 mW in the Idle State

— <1 mW in the Standby State

Advanced audio decoder/decompression capability

— Supports bit streams with adaptive bit rates

— Allows for support of multiple audio decompression

algorithms (MP3, WMA, AAC, ADPCM, Audible,

etc.)

LCD

Controller

Boot

ROM

MaverickKey

TM

ARM720T

ARM7TDMI CPU Core

MMU

8 KB

Cache

Write

Buffer

Internal Data Bus

EPB Bus

SRAM &

FLASH I/F

On-chip SRAM

48 KB

ICE-JTAG

Clocks &

Timers

Keypad&

Touch

Screen I/F

Interrupts,

PWM & GPIO

Bus

Bridge

(2) UARTs

w/ IrDA

Power

Management

Serial

Interface

Digital

Audio

Interface

The Maverick™ EP7309 is designed for ultra-low-power

applications such as digital music players, internet appliances,

smart cellular phones or any hand-held device that features the

added capability of digital audio decompression. The core-

logic functionality of the device is built around an ARM720T

processor with 8 KB of four-way set-associative unified cache

and a write buffer. Incorporated into the ARM720T is an

enhanced memory management unit (MMU) which allows for

support of sophisticated operating systems like Microsoft

®

Windows

®

CE and Linux

®

.

MEMORY AND STORAGE

USER INTERFACE

SERIAL PORTS

1 2 3 4 5 6 ... 41 42

Shrnutí obsahu

Strany 1 - EP7309 Data Sheet

Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) MAR ‘11DS507F2http://www.cirrus.comHigh-performance,Low-power, System-on-chip with EnhancedDig

Strany 2 - OVERVIEW (cont.)

10 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipInternal Boot ROMThe internal 128 by

Strany 3 - Table of Contents

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 11EP7309High-Performance, Low-Power System on ChipSystem DesignAs shown in system bloc

Strany 4

12 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipELECTRICAL SPECIFICATIONSAbsolute Ma

Strany 5 - List of Tables

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 13EP7309High-Performance, Low-Power System on ChipNote: 1) Total power consumption = I

Strany 6

14 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipTimingsTiming Diagram ConventionsThi

Strany 7 - CODEC Interface

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 15EP7309High-Performance, Low-Power System on ChipStatic MemoryFigure 3 through Figure

Strany 8 - Real-Time Clock

16 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipStatic Memory Single Read CycleNote:

Strany 9 - (All Rights Reserved) 9

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 17EP7309High-Performance, Low-Power System on ChipStatic Memory Single Write CycleNote

Strany 10 - Pin Multiplexing

18 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipStatic Memory Burst Read CycleNote:

Strany 11 - System Design

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 19EP7309High-Performance, Low-Power System on ChipStatic Memory Burst Write CycleNote:

Strany 12 - ELECTRICAL SPECIFICATIONS

2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipFEATURES (cont) Dynamically programm

Strany 13 - STANDBY

20 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipSSI1 InterfaceParameter Symbol Min M

Strany 14 - Timing Conditions

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 21EP7309High-Performance, Low-Power System on ChipSSI2 InterfaceParameter Symbol Min M

Strany 15 - Static Memory

22 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipLCD InterfaceParameter Symbol Min Ma

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 23EP7309High-Performance, Low-Power System on ChipJTAG InterfaceParameter Symbol Min M

24 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipPackages208-Pin LQFP Package Charact

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 25EP7309High-Performance, Low-Power System on Chip208-Pin LQFP Pin DiagramNote: 1. N/C

26 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on Chip208-Pin LQFP Numeric Pin ListingTabl

Strany 20 - SSI1 Interface

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 27EP7309High-Performance, Low-Power System on Chip73 VSSIO Pad Gnd74 VDDIO Pad Pwr75 D

Strany 21 - SSI2 Interface

28 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on Chip*With p/u’ means with internal pull-

Strany 22 - LCD Interface

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 29EP7309High-Performance, Low-Power System on Chip256-Ball PBGA Package Characteristic

Strany 23 - JTAG Interface

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 3EP7309High-Performance, Low-Power System on ChipTable of ContentsFEATURES ...

Strany 24 - Packages

30 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on Chip256-Ball PBGA Pinout (Top View))256-

Strany 25 - 208-Pin LQFP

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 31EP7309High-Performance, Low-Power System on ChipB7 DD[2] O LCD serial display data

Strany 26 - (All Rights Reserved) DS507F2

32 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipH6 PB[0]/PRDY[1] IGPIO port B / CL-

Strany 27 - (All Rights Reserved) 27

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 33EP7309High-Performance, Low-Power System on ChipP6 VSSIO Pad ground I/O groundP7 VSS

34 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipJTAG Boundary Scan Signal OrderingTa

Strany 29 - (All Rights Reserved) 29

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 35EP7309High-Performance, Low-Power System on Chip44 N1 nEXTFIQ I 7945 L5 PE[2]/CLKSEL

Strany 30 - 256-Ball PBGA Ball Listing

36 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on Chip102 N12 D[26] I/O 179103 R14 A[25] O

Strany 31 - (All Rights Reserved) 31

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 37EP7309High-Performance, Low-Power System on Chip148 G11 A[7] O 274150 D15 D[7] I/O 2

38 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on Chip1) See EP7309 Users’ Manual for pin

Strany 33 - (All Rights Reserved) 33

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 39EP7309High-Performance, Low-Power System on ChipCONVENTIONSThis section presents acr

4 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on Chip256-Ball PBGA Ball Listing ...

Strany 35 - (All Rights Reserved) 35

40 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipGeneral ConventionsHexadecimal numbe

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 41EP7309High-Performance, Low-Power System on ChipOrdering Information Environmental,

Strany 37 - (All Rights Reserved) 37

42 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipRevision History Revision Date Chang

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 5EP7309High-Performance, Low-Power System on ChipList of FiguresFigure 1. A Maximum EP

Strany 39 - CONVENTIONS

6 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipProcessor Core - ARM720TThe EP7309 in

Strany 40 - Pin Description Conventions

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 7EP7309High-Performance, Low-Power System on Chiprates up to 115.2 kbps. An IrDA SIR p

Strany 41 - Ordering Information

8 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) DS507F2EP7309High-Performance, Low-Power System on ChipSynchronous Serial Interface• ADC (SS

Strany 42 - Revision History

DS507F2 Copyright Cirrus Logic, Inc. 2011(All Rights Reserved) 9EP7309High-Performance, Low-Power System on ChipPLL and Clocking• Processor and Perip

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