Cirrus-logic CS61880 Uživatelský manuál stáhnout pdf (Strana 41)

CS61880

DS450PP3 41

14.33.1 Interrupt Enable Registers

The Interrupt Enable registers: LOS Interrupt En-

able Register (06h) (See Section 14.7 on page 36),

DFM Interrupt Enable Register (07h) (See Sec-

tion 14.8 on page 36), AIS Interrupt Enable Reg-

ister (14h) (See Section 14.21 on page 39), enable

changes in status register state to cause an interrupt

on the INT pin. Interrupts are maskable on a per

channel basis. When an Interrupt Enable register

bit is 0, the corresponding Status register bit is dis-

abled from causing an interrupt on the INT pin.

NOTE: Disabling an interrupt has no effect on the sta-

tus reflected in the associated status register.

14.33.2 Interrupt Status Registers

The following interrupt status registers: LOS In-

terrupt Status Register (08h) (See Section 14.9

on page 36), DFM Interrupt Status Register

(09h) (See Section 14.10 on page 36), AIS Inter-

rupt Status Register (15h) (See Section 14.22 on

page 39), indicate a change in status of the corre-

sponding status registers in host mode. Reading

these registers clears the interrupt, which deacti-

vates the INT pin.

1 2 ... 36 37 38 39 40 41 42 43 44 45 46 ... 69 70

Žádné komentáře

Cirrus-logic CS61880 Uživatelský manuál Strana 41