Cirrus-logic CS5376A Uživatelský manuál stáhnout pdf (Strana 80)

CS5376A

80 DS612F4

Added Test Bit Stream (TBS) synchroniza-

tion in sine wave mode.

The TBS sine wave phase will reset if bit 11 of

the TBSCFG register is set (TBSCFG bit 11 =

1) and a rising edge is received on the SYNC

pin. When TBSCFG bit 11 is set low (TBSCFG

bit 11 = 0), TBS phase is unaffected by the

SYNC input similar to CS5376 revision A/B.

Modified Time Break delay function.

The timing delay between receiving a rising

edge on the TIMEB pin and asserting the

TIMEB flag in the output word status bits is

corrected. In CS5376 revision A/B a '0' value in

the TIMEBREAK register (0x29) disabled the

TIMEB status bit write, and a '1' value set the

status bit in the current output word. Now, a '0'

value sets the TIMEB status bit in the current

output word, and a '1' value delays until the fol-

lowing word.

1 2 ... 75 76 77 78 79 80 81 82 83 84 85 ... 105 106

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Cirrus-logic CS5376A Uživatelský manuál Strana 80