Copyright Cirrus Logic, Inc. 2010(All Rights Reserved)http://www.cirrus.comCS5373ALow-power, High-performance ΔΣ Modulator and Test DACModulator Fea
CS5373A10 DS703F2DAC AC DIFFERENTIAL MODES 1, 2, 3Notes: 22. Maximum amplitude for DAC operation above 100 Hz. A reduced amplitude for higher frequenc
CS5373ADS703F2 11DAC AC DIFFERENTIAL MODES 1, 2, 3 (CONT.) Notes: 25. Specification measured using CS3301A amplifier at corresponding gain with the m
CS5373A12 DS703F2DAC DC COMMON MODE 4Parameter Symbol Min Typ Max UnitDC Common Mode CharacteristicsCommon Mode Output VDCCM- (VA-)+2.35 -VCommon Mod
CS5373ADS703F2 13DAC DC DIFFERENTIAL MODE 5Notes: 28. DC differential output is chopper stabilized and includes low-level 32 kHz out-of-band noise whi
CS5373A14 DS703F2DAC AC COMMON MODE 6Notes: 29. No AC common mode signal is output at 1/64 attenuation due to the attenuator architecture.30. Common m
CS5373ADS703F2 15DIGITAL CHARACTERISTICSNotes: 31. Device is intended to be driven with CMOS logic levels. Parameter Symbol Min Typ Max UnitDigital I
CS5373A16 DS703F2DIGITAL CHARACTERISTICS (CONT.)Notes: 32. MCLK is generated by the CS5378 digital filter. If MCLK is disabled, the device automatical
CS5373ADS703F2 17DIGITAL CHARACTERISTICS (CONT.) MCLKMSYNCtMDATATDATA0(2.048 MHz)(512 kHz)(256 kHz)SYNCMFLAGFigure 4. System Timing DiagramMCLKMSYN
CS5373A18 DS703F2POWER SUPPLY CHARACTERISTICS Notes: 38. All outputs unloaded. Digital inputs forced to VD or GND respectively.39. Power supply reject
CS5373ADS703F2 192. GENERAL DESCRIPTIONThe CS5373A is a high-performance, fourth-order ΔΣ modulator integrated with a digital-to-analog converter (DAC
CS5373A2 DS703F2TABLE OF CONTENTS1. CHARACTERISTICS AND SPECIFICATIONS ... 4SPE
CS5373A20 DS703F23. SYSTEM DIAGRAM CS5373ATDATACAP+CAP-BUF+BUF-OUT+OUT-MCLKMSYNCGNDMODE1MODE2ATT 0ATT 1MODE0ATT 2VA-2.5 VVREF10 ΩVREF +VREF -100 µF
CS5373ADS703F2 214. POWER MODESThe CS5373A has five power modes. Modula-tor mode, AC test modes, and DC test modesare operational modes, while power d
CS5373A22 DS703F25. OPERATIONAL MODESThe CS5373A has seven operational modesand one sleep mode selected by the MODE2,MODE1, and MODE0 pins.5.1 Modulat
CS5373ADS703F2 235.1.4 Modulator Idle TonesThe CS5373A modulator is ΔΣ type and so canproduce ‘idle tones’ in the measurement band-width when the diff
CS5373A24 DS703F2Differential AC test signals out of the CS5373Aconsist of two halves with equal but oppositemagnitude, varying about a common modevol
CS5373ADS703F2 25calibration and differential pulse tests. In mode4, both sets of analog outputs (OUT and BUF)are enabled.5.3.2 DC DifferentialThe sec
CS5373A26 DS703F26. DIGITAL SIGNALSThe CS5373A is designed to operate with theCS5378 digital filter. The digital filter gener-ates the master clock an
CS5373ADS703F2 276.3 MDATA ConnectionThe CS5373A modulator outputs a ΔΣ serialbit stream to the MDATA pin, with a one’s den-sity proportional to the d
CS5373A28 DS703F27. ANALOG SIGNALSThe CS5373A has multiple differential analoginputs and outputs. The modulator analog in-puts are separated into roug
CS5373ADS703F2 29The -3 dB corner of the input anti-alias filter isnominally set to the internal analog samplingrate divided by 64, which itself is a
CS5373ADS703F2 37.5 DAC CAP± Connection ... 307.6 Ana
CS5373A30 DS703F2tests and two external differential inputs. Oneexternal input is typically dedicated to sensormeasurements and the other to testing t
CS5373ADS703F2 318. VOLTAGE REFERENCEThe CS5373A requires a 2.500 V precisionvoltage reference to be supplied to the VREF±pins.8.1 VREF Power SupplyTo
CS5373A32 DS703F2with MCLK.The voltage reference external RC filter seriesresistor creates a voltage divider with theVREF input impedance to reduce th
CS5373ADS703F2 339. POWER SUPPLIESThe CS5373A has a positive analog powersupply pin (VA+), a negative analog powersupply pin (VA-), a digital power su
CS5373A34 DS703F29.4 SCR Latch-upThe VA- pin is tied to the CS5373A CMOSsubstrate and must always be the most-nega-tive voltage applied to the device
CS5373ADS703F2 35• Full-scale Accuracy - Variation in the measured output voltage from the theoretical full-scale output voltage at1x attenuation. The
CS5373A36 DS703F211. PIN DESCRIPTION1234567821222324252627289101112 171819201314 1516Positive Capacitor Output CAP+Negative Capacitor Output CAP-Posit
CS5373ADS703F2 37ATT2, ATT1,ATT022, 23,24I Attenuation Range. Selects the output attenuation range.MODE2, MODE1, MODE025, 26,27I Mode Selection. Deter
CS5373A38 DS703F212. PACKAGE DIMENSIONSNotes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mold
CS5373ADS703F2 3913.ORDERING INFORMATION 14.ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION* MSL (Moisture Sensitivity Level) as specified by
CS5373A4 DS703F21. CHARACTERISTICS AND SPECIFICATIONS• Min / Max characteristics and specifications are guaranteed over the Specified Operating Condit
CS5373A40 DS703F2Contacting Cirrus Logic SupportFor all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one n
CS5373ADS703F2 5TEMPERATURE CONDITIONSABSOLUTE MAXIMUM RATINGSWARNING: Operation at or beyond these limits may result in permanent damage to the devic
CS5373A6 DS703F2ANALOG INPUT CHARACTERISTICS Notes: 7. Maximum integrated noise over the measurement bandwidth for the voltage reference device attach
CS5373ADS703F2 7ANALOG OUTPUT CHARACTERISTICS Notes: 10. Guaranteed by design and/or characterization.11. Load on the precision OUT± outputs is normal
CS5373A8 DS703F2MODULATOR CHARACTERISTICSNotes: 13. The upper bandwidth limit is determined by the CS5378 digital filter cut-off frequency.14. No sign
CS5373ADS703F2 9PERFORMANCE PLOTSFigure 1. Modulator Noise PerformanceFigure 2. Modulator + Test DAC Dynamic Performance
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