Cirrus-logic CS2200-OTP Uživatelský manuál

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Copyright Cirrus Logic, Inc. 2010
(All Rights Reserved)
http://www.cirrus.com
Fractional-N Frequency Synthesizer
Features
Delta-Sigma Fractional-N Frequency Synthesis
Generates a Low Jitter 6 - 75 MHz Clock
Relative to 8 - 75 MHz Reference Clock
Highly Accurate PLL Multiplication Factor
Maximum Error Less Than 1 PPM
One-Time Programmability
Configurable Hardware Control Pins
Configurable Auxiliary Output
Flexible Sourcing of Reference Clock
External Oscillator or Clock Source
Supports Inexpensive Local Crystal
Minimal Board Space Required
No External Analog Loop-filter
Components
General Description
The CS2200-OTP is an extremely versatile system
clocking device that utilizes a programmable phase lock
loop. The CS2200-OTP is based on an analog PLL ar-
chitecture comprised of a Delta-Sigma Fractional-N
Frequency Synthesizer. This architecture allows for fre-
quency synthesis and clock generation from a stable
reference clock. The CS2200-OTP has many configura-
tion options which are set once prior to runtime. At
runtime there are three hardware configuration pins
available for mode and feature selection.
The CS2200-OTP is available in a 10-pin MSOP pack-
age in Commercial (-10°C to +70°C) and Automotive
(-40°C to +85°C) grades. Customer development kits
are also available for custom device prototyping, small
production programming, and device evaluation.
Please see Ordering Information” on page 23 for com-
plete details.
Auxiliary
Output
6 to 75 MHz
PLL Output
3.3 V
8 MHz to 75 MHz
Low-Jitter Timing
Reference
Output to Input
Clock Ratio
N
Timing Reference
PLL Output
PLL Lock Indicator
Fractional-N
Divider
Voltage Controlled
Oscillator
Internal
Loop Filter
Phase
Comparator
Delta-Sigma
Modulator
Hardware Configuration
Hardware Control
MAY '10
DS842F2
CS2200-OTP
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Shrnutí obsahu

Strany 1 - CS2200-OTP

Copyright  Cirrus Logic, Inc. 2010(All Rights Reserved)http://www.cirrus.comFractional-N Frequency SynthesizerFeatures Delta-Sigma Fractional-N Freq

Strany 2

CS2200-OTP10 DS842F2example of how to determine the range of RefClk frequencies around 12 MHz to be used in order toachieve the lowest jitter PLL outp

Strany 3

CS2200-OTPDS842F2 115.3 Output to Input Frequency Ratio Configuration5.3.1 User Defined Ratio (RUD)The User Defined Ratio, RUD, is a 32-bit un-signed

Strany 4 - 1. PIN DESCRIPTION

CS2200-OTP12 DS842F2Selection of the user defined ratio from the four stored ratios is made by using the M[1:0] pins.5.3.4 Ratio Configuration Summary

Strany 5 - 2. TYPICAL CONNECTION DIAGRAM

CS2200-OTPDS842F2 135.4 PLL Clock OutputThe PLL clock output pin (CLK_OUT) provides a buffered version of the output of the frequency synthesizer.The

Strany 6 - DC ELECTRICAL CHARACTERISTICS

CS2200-OTP14 DS842F25.5 Auxiliary OutputThe auxiliary output pin (AUX_OUT) can be mapped, as shown in Figure 8, to one of three signals: refer-ence cl

Strany 7 - AC ELECTRICAL CHARACTERISTICS

CS2200-OTPDS842F2 155.6.2 M2 Mode Pin FunctionalityM2 usage is mapped to one of the optional special functions via the M2Config[2:0] global parameter.

Strany 8 - 4. ARCHITECTURE OVERVIEW

CS2200-OTP16 DS842F25.7 Clock Output Stability Considerations5.7.1 Output SwitchingThe CS2200-OTP is designed such that re-configuration of the clock

Strany 9 - 5. APPLICATIONS

CS2200-OTPDS842F2 176. PARAMETER DESCRIPTIONSAs mentioned in Section 5.1 on page 9, there are two different kinds of parameter configuration sets, Mod

Strany 10

CS2200-OTP18 DS842F26.1.2 Auxiliary Output Source Selection (AuxOutSrc[1:0])Selects the source of the AUX_OUT signal.Note: When set to 11, the AuxLock

Strany 11

CS2200-OTPDS842F2 196.3.3 Enable PLL Clock Output on Unlock (ClkOutUnl)Defines the state of the PLL output during the PLL unlock condition.6.3.4 M2 Pi

Strany 12

CS2200-OTPDS842F2 2TABLE OF CONTENTS1. PIN DESCRIPTION ...

Strany 13

CS2200-OTP20 DS842F27. CALCULATING THE USER DEFINED RATIONote: The software for use with the evaluation kit has built in tools to aid in calculating a

Strany 14

CS2200-OTPDS842F2 218. PROGRAMMING INFORMATIONField programming of the CS2200-OTP is achieved using the hardware and software tools included with theC

Strany 15

CS2200-OTP22 DS842F29. PACKAGE DIMENSIONSNotes: 1. Reference document: JEDEC MO-1872. D does not include mold flash or protrusions which is 0.15 mm ma

Strany 16

CS2200-OTPDS842F2 2310.ORDERING INFORMATIONThe CS2200-OTP is ordered as an un-programmed device. The CS2200-OTP can also be factory programmed forlarg

Strany 17 - 6. PARAMETER DESCRIPTIONS

CS2200-OTP24 DS842F2Contacting Cirrus Logic SupportFor all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find one n

Strany 18

CS2200-OTPDS842F2 3Figure 2. Delta-Sigma Fractional-N Frequency Synthesizer ...8Fi

Strany 19

CS2200-OTP4 DS842F21. PIN DESCRIPTIONPin Name # Pin DescriptionVD 1 Digital Power (Input) - Positive power supply for the digital and analog sections.

Strany 20

CS2200-OTPDS842F2 52. TYPICAL CONNECTION DIAGRAM 21GNDM2M1XTI/REF_CLKTST_INXTOCLK_OUTAUX_OUT0.1 µFVD+3.3 VM0Low-JitterTiming Reference System Microc

Strany 21 - 8. PROGRAMMING INFORMATION

CS2200-OTP6 DS842F23. CHARACTERISTICS AND SPECIFICATIONS RECOMMENDED OPERATING CONDITIONSGND = 0 V; all voltages with respect to ground. (Note ?)Notes

Strany 22 - THERMAL CHARACTERISTICS

CS2200-OTPDS842F2 7AC ELECTRICAL CHARACTERISTICSTest Conditions (unless otherwise specified): VD = 3.1 V to 3.5 V; TA = -10°C to +70°C (Commercial Gra

Strany 23 - 11.REVISION HISTORY

CS2200-OTP8 DS842F24. ARCHITECTURE OVERVIEW4.1 Delta-Sigma Fractional-N Frequency SynthesizerThe core of the CS2200 is a Delta-Sigma Fractional-N Freq

Strany 24

CS2200-OTPDS842F2 95. APPLICATIONS5.1 One Time ProgrammabilityThe one time programmable (OTP) circuitry in the CS2200-OTP allows for pre-configuration

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