Cirrus-logic AN269 Uživatelský manuál stáhnout pdf (Strana 31)

AN269

AN269REV1 31

6.2.3 Vertical Alignment Signals

The vertical timing alignment signals are easily determined by looking at Figure 17.

The total number of lines is equal to the vertical resolution (notice there are no “blank” lines):

VLinesTotal = (vertical resolution) - 1

The VCSYNC signal becomes active when the vertical line counter is VLinesTotal and becomes inactive

when it is VLinesTotal-1. Therefore:

VSyncStart = VLinesTotal

VSyncStop = VLinesTotal - 1

VCSYNC

HSYNC

Single Video Frame

SPCLK

First Line

Vertical Line

Counter Value

Count = VLinesTotal

Count = VLinesTotal - 1

Count = VLinesTotal - 2

Count =0

Count = VLinesTotal

Figure 17. Frame Type 1 Display Vertical Timing

1 2 ... 26 27 28 29 30 31 32 33 34 35 36 ... 64 65

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Cirrus-logic AN269 Uživatelský manuál Strana 31